Can't Happen (logic)

In digital logic, a don't-care term (abbreviated DC, historically also known as ''redundancies'', ''irrelevancies'', ''optional entries'', ''invalid combinations'', ''vacuous combinations'', ''forbidden combinations'', ''unused states'' or ''logical remainders'') for a function is an input-sequence (a series of bits) for which the function output does not matter. An input that is known never to occur is a can't-happen term. Both these types of conditions are treated the same way in logic design and may be referred to collectively as ''don't-care conditions'' for brevity. The designer of a logic circuit to implement the function need not care about such inputs, but can choose the circuit's output arbitrarily, usually such that the simplest circuit results ( minimization).

Don't-care terms are important to consider in minimizing logic circuit design, including graphical methods like Karnaugh–Veitch maps and algebraic methods such as the Quine–McCluskey algorithm. In 1958, Seymour Ginsburg proved that minimization of states of a finite-state machine with don't-care conditions does not necessarily yield a minimization of logic elements. Direct minimization of logic elements in such circuits was computationally impractical (for large systems) with the computing power available to Ginsburg in 1958.

Examples

Examples of don't-care terms are the binary values 1010 through 1111 (10 through 15 in decimal) for a function that takes a binary-coded decimal (BCD) value, because a BCD value never takes on such values (so called pseudo-tetrades); in the pictures, the circuit computing the lower left bar of a 7-segment display can be minimized to by an appropriate choice of circuit outputs for .

Write-only registers, as frequently found in older hardware, are often a consequence of don't-care optimizations in the trade-off between functionality and the number of necessary logic gates.

Don't-care states can also occur in encoding schemes and communication protocols.

X value

"Don't care" may also refer to an unknown value in a multi-valued logic system, in which case it may also be called an X value or don't know. In the Verilog hardware description language such values are denoted by the letter "X". In the VHDL hardware description language such values are denoted (in the standard logic package) by the letter "X" (forced unknown) or the letter "W" (weak unknown).

An X value does not exist in hardware. In simulation, an X value can result from two or more sources driving a signal simultaneously, or the stable output of a flip-flop not having been reached. In synthesized hardware, however, the actual value of such a signal will be either 0 or 1, but will not be determinable from the circuit's inputs.

Power-up states

Further considerations are needed for logic circuits that involve some feedback. That is, those circuits that depend on the previous output(s) of the circuit as well as its current external inputs. Such circuits can be represented by a state machine. It is sometimes possible that some states that are nominally can't-happen conditions can accidentally be generated during power-up of the circuit or else by random interference (like cosmic radiation, electrical noise or heat). This is also called ''forbidden input''. In some cases, there is no combination of inputs that can exit the state machine into a normal operational state. The machine remains stuck in the power-up state or can be moved only between other can't-happen states in a walled garden of states. This is also called a ''hardware lockup'' or ''soft error''. Such states, while nominally can't-happen, are not don't-care, and designers take steps either to ensure that they are really made can't-happen, or else if they do happen, that they create a ''don't-care alarm'' indicating an emergency state for error detection, or they are transitory and lead to a normal operational state.

See also

* Decision table
* Side effect
* Short-circuit evaluation
* Incomplete address decoding
* Incomplete opcode decoding
* Logic redundancy
* Undefined behaviour
* Undefined variable
* Uninitialized variable
* Four-valued logic
* Nine-valued logic

Notes

References

Further reading

* (1191 pages)
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https://archive.org/download/bitsavers_intelMCS80ualOct77_38961682/98-153D__MCS-80_Users_Manual_Oct77.pdf] (NB. Uses the term "don't care" data for address ranges in programmable memory chips which do not need to contain a particular value und thus can remain undefined in the programming instructions.)

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Logic